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ENGR3520HomeworkChapter9

Multiple Choice
Identify the choice that best completes the statement or answers the question.
 

 1. 
Which of the following is not a common logic family used today?
a.
CMOS
c.
ECL
b.
RTL
d.
TTL
 

 2. 
The standard 74XX TTL IC family was originally developed in the
a.
1970s.
c.
1950s.
b.
1960s.
d.
1940s.
 

 3. 
The 54XX TTL IC series is the military version and has
a.
higher current output capability.
b.
a wider temperature range.
c.
more stringent power supply requirements.
d.
all of the above.
 

 4. 
The abbreviation TTL means
a.
two-transistor logic.
c.
transistor-transceiver latch.
b.
three-transistor logic.
d.
transistor-transistor logic.
 

 5. 
The input transistor on a TTL circuit is unusual in that it has
a.
no collector.
c.
multiple bases.
b.
multiple emitters.
d.
no base.
 

 6. 
Each input on a TTL gate is connected to the transistor's
a.
gate.
c.
emitter.
b.
collector.
d.
base.
 

 7. 
The input transistor (Q 1) of a TTL gate acts like
a.
a NAND gate.
c.
a NOR gate.
b.
an OR gate.
d.
an AND gate.
 

 8. 
The output stage of a TTL gate is a special design called a(n)
a.
multiemitter.
c.
MSI.
b.
DIP.
d.
totem-pole.
 

 9. 
The output current capability for a HIGH output condition is called a(n)
a.
fan-out.
c.
exit current.
b.
sink current.
d.
source current.
 

 10. 
The maximum current for a LOW output on a standard TTL gate is
a.
100 ìA.
c.
16 ìA.
b.
40 mA.
d.
16 mA.
 

 11. 
The abbreviated designation for input current with a HIGH input is
a.
IIH.
c.
IIL.
b.
IOL.
d.
VIH.
 

 12. 
The abbreviated designation for input current with a LOW input is
a.
VIH.
c.
IIL.
b.
IIH.
d.
IOL.
 

 13. 
The noise margin for a standard TTL gate is
a.
1.0 V.
c.
1.4 V.
b.
0.8 V.
d.
0.4 V.
 

 14. 
The minimum input voltage recognized as a HIGH by a TTL gate is
a.
2.0 V.
c.
5.0 V.
b.
2.4 V.
d.
0.8 V.
 

 15. 
The maximum input voltage recognized as a LOW by a TTL gate is
a.
0.0 V.
c.
2.4 V.
b.
0.8 V.
d.
0.4 V.
 

 16. 
Which of the following input levels would not be a valid HIGH for a TTL gate?
a.
2.4 V
c.
1.8 V
b.
2.1 V
d.
All are valid.
 

 17. 
Which of the following levels would not be a valid LOW for a TTL gate?
a.
0.7 V
c.
1.0 V
b.
0.1 V
d.
All are valid.
 

 18. 
The time it takes for a square wave to go from 10% to 90% of its voltage level is called
a.
rise time.
c.
fall time.
b.
fan-out.
d.
propagation delay.
 

 19. 
The time it takes for a square wave to go from 90% to 10% of its voltage level is called
a.
fall time.
c.
rise time.
b.
propagation delay.
d.
fan-out.
 

 20. 
Unused inputs on TTL, AND, and NAND gates
a.
degrade the gate's noise immunity.
b.
if left open will have the same effect as HIGH inputs.
c.
should be tied HIGH.
d.
All of the above are correct.
 

 21. 
What advantage does the 74HXX series device have over standard TTL?
a.
lower voltage requirements
c.
low power consumption
b.
higher propagation delay
d.
reduced propagation delay
 

 22. 
What advantage does the 74LXX series device have over standard TTL?
a.
low power consumption
c.
reduced propagation delay
b.
higher propagation delay
d.
lower voltage requirements
 

 23. 
What advantage does the 74SXX series device have over standard TTL?
a.
lower voltage requirements
c.
higher propagation delay
b.
low power consumption
d.
reduced propagation delay
 

 24. 
What advantage does the 74LSXX series device have over standard TTL?
a.
higher propagation delay
b.
reduced propagation delay
c.
low power consumption
d.
low power consumption and reduced propagation delay
 

 25. 
One advantage that MOSFET transistors have over bipolar transistors is
a.
higher switching speed.
c.
low input impedance.
b.
high input impedance.
d.
reduced propagation delay.
 

 26. 
The original CMOS line of circuits is the
a.
74HCOO series.
c.
74C00 series.
b.
5400 series.
d.
4000 series.
 

 27. 
The CMOS series that is pin compatible with the TTL family is the
a.
4000 series.
c.
7400 series.
b.
74C00 series.
d.
5400 series.
 

 28. 
Which potential problem must be overcome when interfacing TTL to CMOS?
a.
The LOW output voltage may be too high.
b.
The output current may not be sufficient.
c.
The HIGH output voltage may be too low.
d.
The HIGH output voltage may be too high.
 



 
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