Multiple Choice Identify the
choice that best completes the statement or answers the question.
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1.
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The Boolean equation for the
exclusive-OR function is
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2.
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When the inputs to an
exclusive-OR gate are the same logic level, the output is
a. | zero. | c. | one. | b. | HIGH. | d. | cannot tell |
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3.
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During which time interval(s)
will output X of this XOR timing diagram be LOW?
a. | time interval
1 | c. | time intervals 3 and
4 | b. | time interval
2 | d. | time intervals 4 and
5 |
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4.
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During which time interval(s)
will output X of this XOR timing diagram be HIGH?
a. | time intervals 1, 3, and
5 | c. | time intervals 2 and
4 | b. | time intervals 1, 4, and
5 | d. | time interval
3 |
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5.
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What is the correct set of
output values for this XOR truth table?
A
B X
0 0
0 1 1
0 1 1
a. | X =
0 1
1 1 | b. | X = 0
0 0
1 | c. | X =
0 1
1 0 | d. | X = 0
0 1
1 |
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6.
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The Boolean equation for the
exclusive-NOR function is
a. | X = A + B +
+ . | c. | X = AB + . | b. | X = . | d. | X = AB + . |
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7.
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During which time interval(s)
will output X of this XNOR timing diagram be LOW?
a. | time intervals 1, 2, 4,
5 | c. | time interval
1 | b. | time intervals 1 and
5 | d. | time interval
3 |
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8.
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What is the correct output for
this XNOR truth table?
A
B X
0 0 0
1 1
0 1 1
a. | X =
1 1
1 0 | b. | X = 0
1 1
0 | c. | X =
1 0
0 1 | d. | X = 0
1 1
1 |
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9.
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Which of these circuits
requires use of an exclusive-OR or an exclusive-NOR gate?
a. | parity
checker | c. | comparator | b. | parity generator | d. | all of the above |
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10.
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In an odd-parity system, the
parity bit is one
a. | when there is an odd number of data
bits. | b. | when there is an odd number of one bits in the
data. | c. | when there is an even number of one bits in the
data. | d. | when there is an even number of one bits in the data and when there is an odd number of data
bits. |
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11.
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In an even-parity system, which
of the following will generate a HIGH (1) parity bit?
a. | 1000011 | c. | 1111011 | b. | 0000011 | d. | 1010011 |
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12.
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In an even-parity system, which
of the following will generate a LOW (0) parity bit?
a. | 1110101 | c. | 1000110 | b. | 1011011 | d. | 0000101 |
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13.
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In an odd-parity system, which
of the following will generate a LOW (0) parity bit?
a. | 1000001 | c. | 0001101 | b. | 1110001 | d. | all of the above |
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14.
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In an odd-parity system, which
of the following will generate a HIGH (1) parity bit?
a. | 1100000 | c. | 1010011 | b. | 1111000 | d. | all of the above |
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15.
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An even-parity checker
indicates a parity error for which received data and parity bit?
a. | data = 1111101 parity =
0 | b. | data = 0001100 parity =
0 | c. | data = 1000011 parity =
1 | d. | data = 1100000 parity =
1 |
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16.
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An odd-parity checker would
indicate no parity error for
which received data and parity bit?
a. | data = 1111110 parity =
0 | b. | data = 1011100 parity =
0 | c. | data = 0000000 parity =
1 | d. | data = 1111111 parity =
1 |
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17.
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Which data and parity bit
combination is correct for an EVEN parity data transmission system?
a. | data = 1010 1111 parity =
1 | b. | data = 0011 0111 parity =
0 | c. | data = 1001 0000 parity =
1 | d. | data = 1110 0110 parity =
1 |
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18.
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Which data and parity bit
combination is correct for an ODD parity data transmission system?
a. | data = 1101 0101 parity =
1 | b. | data = 0000 0001 parity =
0 | c. | data = 0000 0011 parity =
0 | d. | data = 0001 0000 parity =
1 |
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19.
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Which data and parity bit
combination is correct for an ODD parity data transmission system?
a. | data = 0110 1110 parity =
0 | b. | data = 1110 0111 parity =
0 | c. | data = 0010 1111 parity =
1 | d. | data = 0010 0110 parity =
1 |
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20.
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An exclusive-OR gate will
invert a signal on one input if the other input is
a. | always
HIGH. | c. | grounded. | b. | connected to the same signal. | d. | inverted. |
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21.
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A HIGH output if one or the
other inputs is HIGH, but not both; describes a(n) ________ gate.
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22.
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How many XNOR gates does it
take to make a 4 bit binary comparator?
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23.
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In an even-parity system, which
of the following will generate a HIGH (1) parity bit?
a. | 1000110 | c. | 1011001 | b. | 1000100 | d. | 1111011 |
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24.
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If the same signal is connected
to both inputs of an XOR gate, the output is
a. | undetermined. | c. | HIGH. | b. | LOW. | d. | a clock
waveform. |
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