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ENGR3520HomeworkChapter4

Multiple Choice
Identify the choice that best completes the statement or answers the question.
 

 1. 
Which of the following is not a type of PLD?
a.
FPGA
c.
SPLD
b.
CPLD
d.
FSAG
 

 2. 
The outputs of SPLD AND gates are called
a.
component terms.
c.
double terms.
b.
product terms.
d.
additive terms.
 

 3. 
Sequential logic is logic that uses
a.
AND gates.
c.
programmable gates.
b.
flip-flops.
d.
OR gates.
 

 4. 
The process where PLD software reads a CAD drawing and converts it into a binary file is called
a.
HDL.
c.
schematic capture.
b.
compiling.
d.
CAD capture.
 

 5. 
The type of programmable logic used in CPLDs is called
a.
volatile.
c.
macro logic.
b.
EEPROM.
d.
look-up table.
 

 6. 
Which of the following PLD types uses a look-up table method to resolve logic requirements?
a.
FSAG
c.
FPGA
b.
SPLD
d.
CPLD
 

 7. 
A look-up table is
a.
a truth table.
c.
an artists rendering.
b.
a set of directions.
d.
a schematic diagram.
 

 8. 
Which of the following allow the user to connect pre-defined logic symbols?
a.
waveform simulator
c.
VHDL editor
b.
compiler
d.
schematic editor
 

 9. 
Which of the following help the user define logic in a programming environment?
a.
waveform simulator
c.
schematic editor
b.
VHDL editor
d.
compiler
 

 10. 
Which of the following is a language and symbol translation program?
a.
compiler
c.
VHDL editor
b.
waveform simulator
d.
schematic editor
 

 11. 
Which of the following provides a means to check the logic operation of a design?
a.
VHDL editor
c.
compiler
b.
waveform simulator
d.
schematic editor
 

 12. 
What are the two most common methods of PLD design entry?
a.
logic simulator and design entry
c.
logic simulator and AND gates
b.
schematic entry and AND gates
d.
design entry and schematic entry
 

 13. 
The number of product terms in the equation Y = mc013-1.jpgBC + mc013-2.jpgCD + Bmc013-3.jpgD is
a.
3.
c.
11.
b.
9.
d.
5.
 

 14. 
The number of different ICs needed to implement the equation Y = mc014-1.jpgB + mc014-2.jpg + mc014-3.jpg is
a.
3.
c.
6.
b.
8.
d.
5.
 

 15. 
The number of possible outputs obtained from a 4-input look-up table is
a.
12.
c.
4.
b.
8.
d.
16.
 

True/False
Indicate whether the statement is true or false.
 

 16. 
Most PLDs are erasable and reprogrammable.
 

 17. 
VHDL formatting convention states that variables should be capitalized.
 

 18. 
VHSIC stands for very high speed integrated circuit.
 

 19. 
An FPGA does not lose its logic program once power is removed from the chip.
 



 
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