True/False
Indicate whether the
statement is true or false.
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1.
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In general, an n-bit counter has a maximum modulus of
2n and a count sequence from 1 to
(2n – 1) (i.e., all
0s to all 1s).
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2.
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A ring counter requires more flip-flops than a binary counter to produce the
same number of unique states.
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3.
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Parallel loading is synchronous only.
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4.
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A counter, such as a mod-12 counter, whose modulus is less than
2n, is called a full-sequence counter.
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5.
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In any truncated sequence counter, it is good practice to determine the next
state for each unused state to ensure that if the counter powers up in one of these unused states, it
will eventually enter the main sequence.
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Multiple Choice
Identify the
choice that best completes the statement or answers the question.
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6.
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“A closed system of counting and adding, whereby a sum greater than the
largest number in a sequence rolls over and starts from the beginning” describes:
a. | truncated-sequence | c. | rotation | b. | modulo
arithmetic | d. | maximum modulus
(mmax) |
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7.
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______ are circuits that store and move data.
a. | Counters | c. | State machines | b. | Ring counters | d. | Shift registers
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8.
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A counter is a digital circuit that has a number of ______ whose states progress
through a fixed sequence.
a. | binary valves | c. | binary outputs | b. | synchronous inputs | d. | applied clock
pulses |
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9.
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A table showing the required input conditions for every possible transition of a
flip-flop output is a(n) ______ table.
a. | rotation | c. | K-map | b. | excitation | d. | count-sequence |
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10.
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______ is a function that allows simultaneous loading of binary values into all
flip-flops of a synchronous circuit.
a. | Parallel load | c. | Count enable | b. | Bidirectional control | d. | Shift register |
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11.
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Movement of data from one end of a shift register to the other at a rate of one
bit per clock pulse is called:
a. | right shift | c. | parallel transfer | b. | left shifting | d. | serial shifting |
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12.
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A ______, also called a twisted ring counter, is a serial shift register with
complemented feedback from the output of the last flip-flop to the input of the first.
a. | Johnson counter | c. | synchronous counter | b. | full-sequence counter | d. | truncated-sequence
counter |
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13.
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One of the most common digital counters is a(n) ______; once it counts to
12:59:59, we can be sure that it will go to 1:00:00 next.
a. | alarm clock | c. | shift register | b. | shift register counter | d. | optical sensor |
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14.
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______ is/are the number of states through which a counter sequences before
repeating.
a. | Status lines | c. | Waveform change | b. | Unused states | d. | Modulus |
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15.
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A(n) ______ can be problematic because a flip-flop is not necessarily guaranteed
to power up in a particular state.
a. | synchronous or asynchronous clear (reset) | b. | terminal
count | c. | unused state | d. | rotation |
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16.
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A set of flip-flops in a synchronous circuit that holds its present state is
a:
a. | present state | c. | next state | b. | memory section | d. | command line |
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17.
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A(n) ______ is a counter that can count up or down, depending on the state of a
control input.
a. | RCO | c. | bidirectional counter | b. | binary counter | d. | presettable
counter |
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18.
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______ is a control function that allows a counter to progress through its count
sequence when active and disables the counter when inactive.
a. | Parallel transfer | c. | Switchable toggle mode | b. | Universal shift
register | d. | Count enable
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19.
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______ is a special case of output decoding that produces a pulse upon detecting
the terminal count, or last state, of a count sequence.
a. | Applied clock pulse | b. | Bidirectional control | c. | Frequency
division | d. | Ripple carry out or ripple clock out (RCO) |
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20.
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The abbreviation for an n-bit shift register is ______.
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